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SRC COMPUTERS PRESENTS PAPER AT The International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11)

July 18, 2011

 

SRC Computers presented a paper at ERSA'11 detailing general requirements and challenges of productive toolflows for FPGA systems. It also presents the SRC MAP® processor, Carte development environment, and associated runtime environment for efficient application execution. Lastly, the paper demonstrates the efficiency of the SRC toolflow with a string-matching application. The abstract and poster may be viewed below.

  • The Tools Have Arrived: Two-Command Compilation and Execution of Scalable, Multi-FPGA Applications
        Paper
        Poster

 

SRC Computers to Debut Full Line of Reconfigurable Airborne Computing Systems at AUVSI’s Unmanned Systems North America 2010

August 10, 2010

 

SRC Computers will debut the latest in reconfigurable airborne computing technology – the ATLAS™ Processing System and the Mid-Sized Signal Data Processor  – at AUVSI’s Unmanned Systems North America 2010, booth #1533. SRC Computers’ airborne computing systems are being used for such compute-intensive UAV applications as Synthetic Aperture Radar and image processing as well as commercial airborne mapping applications.

 

SRC COMPUTERS PRESENTS TWO PAPERS AT THE 13TH ANNUAL HIGH PERFORMANCE EMBEDDED COMPUTING WORKSHOP (HPEC) 2009

September 28, 2009

 

SRC Computers presented two papers at HPEC 2009 detailing its advances in UAV image stabilization and SAR image processing on Lockheed Martin's TRACER UAV program. The abstracts and posters for each may be viewed below.

 

  • Signal/Data Processor Implementation and Algorithms for Realtime Wide-Angle Ultra-Wideband SAR Image Formation
        Abstract
        Poster
  • UAV Video Image Stabilization on the SRC® MAP® Processor
        Abstract
        Poster

 

JOINT PROJECT BETWEEN JACKSON STATE UNIVERSITY AND U.S. ARMY CORPS OF ENGINEERS USES FIRST INFINIBAND-BASED SRC-7 CLUSTER

March 24, 2009

 

SRC Computers has announced that Jackson State University (JSU), Jackson, Mississippi, has installed an SRC-7 cluster system in support of a joint research project between JSU and the U.S. Army Engineer Research and Development Center (ERDC). The SRC system being used in the JSU – ERDC joint research project is the world’s first Infiniband-based SRC-7 MAPstation cluster, with each node having the performance of hundreds of microprocessors. The system consumes 90 percent less power than a microprocessor-based cluster and is easily capable of scaling to tens of thousands of nodes.

 

 

SRC SHIPS FIRST AIRBORNE SIGNAL DATA PROCESSOR FOR LOCKHEED MARTIN’S TRACER PROGRAM

November 10, 2008

 

SRC Computers has announced that it has shipped the first on-board signal data processor (SDP) for Lockheed Martin’s Tactical Reconnaissance and Counter-Concealment Enabled Radar (TRACER) program. The unique SRC IMPLICIT+EXPLICIT Architecture provides TRACER with compute-intensive reconfigurable processing in a compact form-factor. The SDP designed for TRACER is comprised of a multi-MAP® processor system that weighs 80 pounds, consumes less than 600 watts of power and measures 20”D x 17”W x 10”H while being functionally equivalent to about 100 Power PCs for this application.

 

 

SRC to Provide Computing Solutions for PI TrackR Program

April 28, 2008

 

SRC Computers has announced that it has been selected to provide processors for the Precision Image Tracking and Registration (PI TrackR) program developed by the Air Force Research Lab’s (AFRL) Sensors Directorate. SRC COTS Portable MAPstationsystems will be flown on-board small UAVs with high resolution cameras connected directly to the MAP processor’s GPIOX port, providing real-time high pixel count imaging and metadata to track pilot/operator identified targets.

 

 

SRC Computers Integrates Atrato Velocity1000 to Surpass Data Access Requirements in HPC Environments
First Customer Deployment Sets New Benchmark in Sustained Bandwidth

March 25, 2008

 

SRC Computers has integrated the Atrato V1000 into its Hi-Bar interconnected system solutions that utilize the SRC MAP processor, providing unmatched capabilities to randomly access terabytes of data for customers in defense and intelligence, scientific and academic research, medical imaging, and financial sectors. 

 

SRC Demonstrates New MAP Processor on AMD64 Platform at Supercomputing 2007

November 12, 2007

 

SRC Computers demonstrated its implementation of a Black-Scholes double precision floating point algorithm, one of the most important mathematical tools in modern finance, on its newest Series I MAP reconfigurable processor at the Supercomputing 2007 show in Reno, Nev.

 

SRC Selects Altera for Next-Generation MAP Processor

November 12, 2007

 

Altera Corporation today announced that SRC Computers, Inc. has chosen the Stratix® II FPGA device for their new Series I MAP reconfigurable processor module used in high- performance computing applications such as financial, defense, energy and biometrics. Systems built with the Series I MAP are part of the SRC-7 product line that can accelerate applications such as Black-Scholes or medical imaging by over 30 times compared to current dual-core CPUs.

 

SRC COMPUTERS Chosen by Lockheed Martin for U.S. Army Program
SRC to Provide Both Ground and Airborne Computing Systems for TRACER

August 15, 2007

 

SRC Computers has announced that it has been chosen by Lockheed Martin to provide both ground and airborne processing solutions for the U.S. Army’s Tactical Reconnaissance and Counter-Concealment Enabled Radar (TRACER) program. The $40 million TRACER contract was awarded to Lockheed Martin by the Army in May of this year and incorporates low frequency synthetic aperture radar systems into Predator class unmanned aerial vehicles (UAVs).

 

SRC ANNOUNCES SUPPORT FOR AMD TORRENZA INITIATIVE
Testing Underway with HP Servers

June 18, 2007

 

SRC Computers has announced its support for AMD’s Torrenza initiative and will incorporate its heterogeneous IMPLICIT+EXPLICIT Architecture and Carte Programming Environment into servers with AMD microprocessors.

 

NCSA ADDS SIMULINK PROGRAMMING CAPABILITY TO SRC'S PORTABLE MAPSTATION
Results Demonstrated in Two Recent Conference Presentations

October 10, 2006

 

Researchers at the National Center for Supercomputing Applications (NCSA), in collaboration with SRC Computers, Inc., have developed a technique that allows developers to use the MathWorks' Simulink platform to program an SRC reconfigurable computing system.

 

NCSA TO ADD MATLAB / SIMULINK PROGRAMMING CAPABILITY TO SRC’S RECONFIGURABLE COMPUTING SYSTEMS

May 10, 2006

 

SRC Computers has announced that it has entered into a joint development agreement with NCSA™ (National Center for Supercomputing Applications). The result of the collaboration will describe in detail how to utilize MATLAB/Simulink, Xilinx DSP System Generator, and the SRC Carte™ programming environment macro capability to implement Simulink fixed-point designs on SRC’s reconfigurable MAP® processors.

 

SRC ANNOUNCES FIRST ANNUAL USER MEETING

March 2, 2006

 

SRC Computers has announced its first annual User Meeting. The 2006 event will be held on July 11 at the NCSA facilities at the University of Illinois, Urbana-Champaign.

 

SRC COMPUTERS LAUNCHES ITS NEXT-GENERATION RECONFIGURABLE COMPUTING SYSTEM -- THE SRC-7

August 25, 2005

 

SRC Computers has announced the availability of its SRC-7 reconfigurable computing system.

 

GEORGE WASHINGTON UNIVERSITY PURCHASES THEIR SECOND SRC SYSTEM

October 19, 2004

 

SRC Computers has shipped the latest version of its SRC-6 computer system to George Washington University (GWU). This new MAP-based system with Hi-Bar Switch and Common Memory has 10 times the performance of GWU’s existing SRC system, which was delivered just 2 years ago.

 

SRC COMPUTERS AWARDED AFRL SENSORS DIRECTORATE CONTRACT

September 7, 2004

 

SRC Computers has been awarded a development contract to create a miniaturized computer system based on their Unified Computing Architecture™ (UCA) and reconfigurable MAP processor for the Air Force Research Laboratory (AFRL) Sensors Directorate. The system will initially be used to support a variety of unmanned air vehicles (UAVs) and other Air Force sensor applications.

 

System-level approach wins for uav radar payload designs
A unified system-level approach for military UAV applications puts embedded heterogeneous reconfigurable computing to work providing a low-SWaP solution.

COTS Journal Magazine

April 2011

 

Over the last decade the use of UAVs has grown from a rarity—strictly in support of high-risk military operations—to virtually commonplace, supporting border security, drug enforcement and mapping to name a few application domains. The military market however still remains a UAV market segment that is seeing some of the most dramatic growth. Confined by Size, Weight and Power (SWaP), developers are now seeking new ways to deliver these compute-intensive applications that military UAV customers are demanding.

 

Rapid Deployment of Scalable, Dense ISR Payloads for UAVs
Reconfigurable architectures and scalable software tools are proving themselves essential in the speedy development of Intelligence, Surveillance, and Reconnaissance (ISR) payloads.

Military Embedded Systems Magazine

March/April 2011

 

In light of increasing demands for advanced rapid prototyping and deployment of ISR applications on UAV platforms, systems engineers would be wise to examine reconfigurable architectures and flexible software tools that match the job’s qualifications.

 

Architecture for Airborne Applications
Processors for Airborne Intelligence, Reconnaissance, and Surveillance

Advanced Imaging Magazine

June 2010

 

This article presents an overview of SRC Computers' IMPLICIT+EXPLICIT Architecture and MAP processor-based systems that are being utilized by several airborne programs to perform compute-intensive image and synthetic aperture radar (SAR) processing. 

 

 

Reconfigurable cluster computing installation could be a first

Programmable Logic DesignLine

April 2009

 

Could the world's first large reconfigurable computing cluster be installed at Mississippi's Jackson State University (JSU)? Could be, according to SRC Computers, the system's builder. 

 

 

Implementing On-Board Cloud Detection on a Reconfigurable Computer

Defense Tech Briefs

April 2009

 

Researchers at NASA and The George Washington University are using SRC reconfigurable computing systems to enable real-time on-board processing of cloud contamination for satellite remote sensing.

 

 

FPGA Boards and Systems Boost UAV Payload Compute Density

COTS Journal

February 2009

 

With a goal toward improving radar capability, image processing and overall mission autonomy, developers of Large UAV payloads are shifting to FPGA-based computing solutions.

 

 

“Projecting” images in radar and medical applications

DSP-FPGA.com

April 2008

 

Filtered backprojection is finding its way into both radar and medical imaging applications and is well served by FPGAs to handle a portion of the algorithm. The results are outstanding.

 

CRAY’S LEGACY - COMPUTER DEVELOPER'S IDEAS THRIVE

The Gazette

November 13, 2006

 

Although he died a decade ago, supercomputer developer Seymour Cray’s legacy lives on through the technology he developed at SRC Computers, Inc. The Colorado Springs- based company has spent more than $60 million to bring the power of a supercomputer to a much broader market.

 

HIGH TECH LESSON IN U.S. BUSINESS - LOCAL COMPANIES SHARE KNOWLEDGE WITH RUSSIANS

The Gazette

August 22, 2006

 

Eleven Russian delegates have been in Colorado Springs for the past 11 days touring local computer companies, including SRC Computers, to glean knowledge to take back to their country.

 

ARE FPGAs A DISRUPTIVE TECHNOLOGY FOR HPC?

HPCwire

February 24, 2006

 

HPC is always keen to exploit innovation if it provides real performance gains, but are FPGAs the next disruptive technology to deliver for HPC?

 

RECONFIGURABLE PROCESSING DESIGN SUITS UAV RADAR APPS
UAV-based radar electronics require supercomputing performance in a compact space. A reconfigurable computer architecture offers the compute density to fit the bill

COTS Journal

October/November 2005

 

Engineers at the Air Force Research Laboratory (AFRL) and SRC Computers demonstrate the performance gain of a two-dimensional Synthetic Aperture Radar (2-D SAR) backprojection algorithm running on SRC’s Compact MAP™ processor architecture compared to a MATLAB and C implementation of the algorithm.

 

SRC CODE; 'TIS A FAR, FAR BETTER COMPILER

FPGA & Programmable Logic Journal

July 2005

 

The author examines researchers and engineers from two distinct camps with distinct goals attacking the same technical challenge from two different directions. The two camps meet at the FPGA.

 

APPLICATION DEFINED PROCESSORS

Linux Journal

December 2004

 

This article explains RC, examines SRC systems that implement RC, and shows the performance advantage RC provides over traditional microprocessors.

 

HIGH-FLYING COMPUTER PROCESSING

Homeland Science & Technology Journal

November 2004

 

SRC has been awarded a development contract by the AFRL that addresses a long-standing challenge of creating a powerful miniaturized computer system for use on-board UAVs. The resulting mobile computer is expected to perform 96 Gflops with more than 6 Gbytes/s of direct sensor I/O bandwidth in a single computer weighing as little as 10 pounds.

 

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