Hardware Specifications

Series C through Series H MAP® Processor Specifications

Series I MAP Processor Specifications

SNAP Interface Specifications

Hi-Bar®Network Switch Specifications

 

Series C through Series H MAP® Processor Specifications

 

MAP Series

C

E

F

G

H

  no longer shipping SRC-6 MAPstations,  Systems & Servers  Portable MAPstations 6U SRC-7 MAPstations,  Systems & Servers 

Logic 

User Logic Chips

XC2V6000

XC2VP100

XC2VP100

XC2VP100 EP2S180

Control Logic Chip

XC2V6000

XC2V6000

XC2V6000

XC2V6000 EP2S130

Nominal Clock Rate (MHz)

100

100

100

100 150

Total User Logic Reconfiguration Time  (ms)

50

100

100

100 100

On- Board-Memory (OBM) 

# On-Board-Memory Banks

7

7

7

7 8

Total OBM Bandwidth (BW)  (Gbytes/s)

11.2

11.2

11.2

11.2 19.2

OBM BW to User Logic  (Gbytes/s)

6.4

6.4

6.4

6.4 19.2

OBM BW to Control Logic  (Gbytes/s)

4.8

4.8

4.8

4.8 7.2

OBM Bank Width  (bits)

64

64

64

64 64

Total Simultaneous OBM Accesses 
(reads or writes)

14

14

14

14 16
Simultaneous User Logic OBM Accesses 
(reads or writes)
 
8 8 8 8 16

Total OBM Size  (Mbytes)

28

28

28

28 64

Bridge Port BW    (Gbytes/s)

4.8

4.8

4.8

4.8 4.8

MAP to System Interconnect 

Sustained MAP Input Payload BW from System  (Gbytes/s)

1.4

1.4

0.7

1.4 7.2

Sustained MAP Output Payload BW to System  (Gbytes/s)

1.4

1.4

0.7

1.4 7.2

Simultaneous Sustained MAP Payload I/O BW to and from System    (Gbytes/s)

2.8

2.8

0.7

2.8 14.4

General Purpose I/O (GPIO) 

Number of GPIO Ports per MAP

2

2

2

2 2

GPIO Signal Level Standards

LVTTL

LVTTL/ LVDS

2.5LVTTL/ LVDS

2.5VTTL/ LVDS

2.5VTTL/ LVDS

# Signal Paths per GPIO Port

92

112/51

96/48

96/48 96/48

Sustainable GPIO BW per Port  (Gbytes/s)

2.4

2.4/3.2/ 4.8

2.4/4.8

2.4/4.8 3.6/4.8

Maximum Data Rate per Signal Path  (Mbits/s)

200

200/800

200/800

 200/800

300/1000

GPIO Interconnect Medium

Coax Ribbon

Coax Ribbon

User Determined

User Determined User Determined

Physical Specifications 

Power Supply Voltage

+12vdc

+12vdc

+12vdc

+12vdc, 3.3v, 5v +12vdc

Maximum Power Consumption  (watts)

50

60

60

60 80

Form Factor

5.25

5.25

Compact MAP™

Compact PCI 5.25

Cooling Methodology

Air

Air

Air

Air/Spray Air

MTBF  (Khours)

195

195

195

195 195

Availability

Now

Now

Now

Now Now

  SRC reserves the right to update these specifications at any time.

 

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Series I MAP Processor Specifications

Port Configuration

Memory Bus Width (bits)

144

Interleaved Memory Bus

Yes

SECDED Error Correction Code

Yes

SNAP Memory Bus Clock Rate (MHz)

133

Bandwidth (BW)

Microprocessor to MAP SDRAM Memory (Gbytes/s)

4.2

MAP SDRAM Memory to MAP Controller (Gbytes/s)

4.2

Control Logic to User Logic, Aggregate (Gbytes/s)

6.4

Physical Specifications

Maximum Power Consumption (watts)

18

Form Factor

Pi